The PTN3360A is a High-Definition Multimedia Interface or Digital Visual Interface (HDMI/DVI) level shifter with inverting Hot Plug Detect (HPD). This device features multiple level shifting such as ...
Level-shifters are an indispensable circuit in multi-power-domain SoCs. Many techniques and architectures have been proposed to enhance the performance of these circuits. Inverter-based level shifters ...
SEOUL, South Korea--(BUSINESS WIRE)--Magnachip Mixed-Signal, Ltd. (“MMS” or the “Company”) announced today the release of a multi-functional Power Management Integrated Circuit (PMIC) and a ...
When designing a system, one of the most important design decisions is choosing what voltage domain(s) to use. Some voltage domains, such as 5 V, are good for noisy and harsh operating environments ...
During board bring-up and multimeter probing, he found that the 1.8 V-shifted RESET signal went down to 1.0V — and its 3.3 V counterpart stayed at 2.6V. Was it a current fight between GPIOs? A faulty ...
Use of buck-boost circuits in switching-regulator ICs. Considerations in level-shift circuit design. Switching regulators with internal level shifting. The magnitude of the negative voltage generated ...
Toshiba is aiming at UART and SPI interfaces with three four-channel dual-supply level-translator-transceivers. “The bus transceivers support level-up and level-down voltage translation from either of ...
VLSI technology is enabling the realization of complex System on Chip (SoC) designs where different parts of a system, such as analog and digital circuits, as well as passive components, are ...
Pericom Semiconductor has expanded its translator portfolio with a patented, advanced Universal Level Shifter (ULS) technology that lets customers use a bi-directional automatic direction sensor for ...
During board bring-up and multimeter probing, he found that the 1.8 V-shifted RESET signal went down to 1.0V — and its 3.3 V counterpart stayed at 2.6V. Was it a current fight between GPIOs? A faulty ...
The Unified Power Format (UPF) is used to specify the power intent of a design. Once written, the UPF file is applied at every stage of the design cycle — starting with the RTL, then the gate-level, ...
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