Altera Corporation has announced that the U.S. Department of State has certified that the company's HardCopy II structured ASIC design and manufacturing flow is compliant with International Trade in ...

The past few years have seen substantial shifts in how logic content is delivered into electronic systems. The most dramatic of these changes is the sharp reduction of traditional ASIC design starts — ...

When you think about it, logic synthesis is a vital but rather intimidating part of modern chip design. This process takes a high-level description of intended functionality, written in an RTL ...

The diagram below outlines a generic ASIC development flow in grey. When developing an ASIC compliant to ISO 26262 there are additional phases, which are shown in blue. Figure 1. ASIC development flow ...

Although it lacks the reprogrammability of an FPGA, this structured ASIC promises to deliver 350 MHz of system performance, densities of up to 2.2 million ASIC gates, and 8.8 Mb of memory. System ...

Orders were up for Emerson Process Management’s largest-selling product when a supplier of a critical ASIC component unexpectedly issued an end-of-life notice for its part. A major supplier of ...